PowerPC Assembly Quick Reference Information


Simplified Mnemonics for PowerPC Assembly  

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Simplified Mnemonics for PowerPC 555 Assembly

Instruction

Description

Other Registers Altered

Explanation of Operation

add  rD, rA, rB Add CR0 (LT, GT, EQ, SO) rD ¬ rA + rB
addi  rD, rA, value Add immediate None rD ¬ rA + value
addis  rD, rA, value Add immediate shifted left by 16 bits None rD ¬ rA + (value << 16)
and  rA, rS, rB AND None rA ¬ rS & rB
andi.  rA, rS, value AND Immediate CR0 (LT, GT, EQ, SO) rA ¬ rS & value
andis.  rA, rS, value AND Immediate shifted left by 16 bits CR0 (LT, GT, EQ, SO) rA ¬ rS & (value << 16)
b  target_addr Branch Always None Branch to target_addr
ble  target_addr Branch if less than or equal to (LT or EQ flags of CR0 set) None Branch to target_addr if LT = 1 or EQ = 1
blt  target_addr Branch if less than (LT of CR0 set) None Branch to target_addr if LT = 1
beq  target_addr Branch if equal (EQ of CR0 set) None Branch to target_addr if EQ = 1
bge  target_addr Branch if greater than or equal to (GT or EQ of CR0 set) None Branch to target_addr if GT = 1 or EQ = 1
bgt  target_addr Branch if greater than (GT of CR0 set) None Branch to target_addr if GT = 1
blr  target_addr Branch to LR (Link Register) None Branch and link to target_addr
bne  target_addr Branch if not equal (EQ of CR0 not set) None Branch to target_addr if EQ = 0
cmpw  rA, rB Compare Word CR0 (LT, GT, EQ, SO) rA - rB
cmpwi  rA, value Compare Word Immediate CR0 (LT, GT, EQ, SO) rA - value
la  rD, label Load Address based upon offset value None rD ¬ label
lbz  rD, d(rA) Load Byte and Zero None rD ¬ m[rA + d]
lbzx  rD, rA, rB Load Byte and Zero Indexed None rD ¬ m[rA + rB]
lhz  rD, d(rA) Load Half Word and Zero None rD ¬ M[rA +d]15..0
lhzx  rD, rA, rB Load Half Word and Zero Indexed None rD ¬ M[rA +rB]15..0
li  rA, value Load immediate None rA ¬ value
lis  rA, value Load immediate shifted left by 16 bits None rA ¬ (value << 16)
lwz  rD, d(rA) Load Word and Zero None rD ¬ M[rA + d]
lwzx  rD, rA, rB Load Word and Zero Indexed None rD ¬ M[rA + rB]
mr  rA, rS Move Register None rA ¬ rS
not  rA, rS Complement Register (invert) None rA ¬ ~rS
ori  rA, rS, value OR Immediate None rA ¬ rS | value
oris  rA, rS, value OR Immediate shifted left by 16 bits None rA ¬ rS | (value << 16)
slwi  rA, rS, value Shift Left Immediate None rA ¬ (rS << value)
srwi  rA, rS, value Shift Right Immediate None rA ¬ (rS >> value)
stb  rS, d(rA) Store Byte None m[rA + d] ¬ rS7..0
stbx  rS, rA, rB Store Byte Indexed None m[rA + rB] ¬ rS7..0
sth  rS, d(rA) Store Half Word None M[rA + d]15..0 ¬ rS15..0
sthx  rS, rA, rB Store Half Word Indexed None M[rA + rB]15..0 ¬ rS15..0
stw  rS, d(rA) Store Word None M[rA + d] ¬ rS
stwx  rS, rA, rB Store Word Indexed None M[rA + rB] ¬ rS
sub  rD, rA, rB Subtract None rD ¬ rA - rB
subi  rD, rA, value Subtract Immediate None rD ¬ rA - value
subis  rD, rA, value Subtract Immediate shifted left by 16 bits None rD ¬ rA - (value << 16)

Notes:
M[i] - refers to the contents of the word of memory beginning at location i.
m[i] - refers to the contents of the byte of memory beginning at location i.
7..0 - subscripts indicate bit positions (with 0 being the least significant bit)


Examples

Given the following memory dump:

0x00001000    01 23 45 67 89 AB CD EF
0x00001008    FF FF FF FF FF FF FF FF

Given these values:
    r11 = 0x00001000
    r12 = 0x00001002   
    IO_DIGITAL_INPUT_DIP_1 = 0x4000000B    ; variable defined in code, address of DIP Switch 1

lis  r3, IO_DIGITAL_INPUT_DIP_1@h             ; r3 = High-order 16 bits of address of DIP switch 1

r3 ¬ (IO_DIGITAL_INPUT_DIP1@h << 16)    ; use @h to get the higher 16 bits
r3 ¬ (0x4000 << 16)
r3 = 0x40000000

ori  r3, r3, IO_DIGITAL_INPUT_DIP_1@l         ; r3 = r3 | Low-order 16 bits of address of DIP switch 1

r3 ¬ r3 | IO_DIGITAL_INPUT_DIP1@l            ; use @l (lower case L) to get the lower 16 bits
r3 ¬ r3 | 0x000B
r3 ¬ 0x40000000 | 0x000B
r3 = 0x4000000B

li  r7, 0                     ; Load r7 with immediate value of 0 (signed 16-bit number)

            r7 ¬ value
            r7 = 0x0000

lbz  r5, 0(r11)            ; Load r5 with byte value at memory location (r11 + 0)

r5 ¬ m[d + rA]
r5 ¬ m[0 + r11]
r5 ¬ m[0 + 0x00001000]
r5 = 0x01

lwz  r6, 0(r11)        ; Load r6 with word value at memory location (r11 + 0)

r6 ¬ M[d + rA]
r6 ¬ M[0 + r11]
r6 ¬ M[0 + 0x00001000]
r6 = 0x0123

lbz  r7, 2(r11)        ; Load r7 with byte value at memory location (r11 + 2)

r7 ¬ m[d + rA]
r6 ¬ m[2 + r11]
r7 ¬ m[2 + 0x00001000]
r7 = 0x45

stb r5, 8(r11)        ; Store byte from r5 into memory at (r11 + 8)

m[d + rA] ¬ r5
m[8 + 0x00001000] ¬ 0x01
m[0x00001008] = 0x01

Before:
0x1008    FF FF FF FF FF FF FF FF

After:
0x1008    01 FF FF FF FF FF FF FF
 


Assembly File Information

  1. First, for CodeWarrior to be able to access your function you need the following line:

    .function "MyFile", PPC_Start_Asm, PPC_End_Asm - PPC_Start_Asm

    Where "MyFile" is the name of your file (without the extension), PPC_Start_Asm is a label at the beginning of your code, and PPC_End_Asm is a label at the end of your code.  The "PPC_End_Asm - PPC_Start_Asm" portion tells CodeWarrior the size of your function in bytes (difference between end and beginning addresses).
  1. Next, tell the compiler that the following section is your assembly code and not something else. Put .text at the start of your assembly function:

    .text
     
  2. Finally, put a label for the beginning of your program, following the label for PPC_Start_Asm:

    PPC_Start_Asm:
    MyFunction:

    Both PPC_Start_Asm and MyFunction will contain the same address.
     

Here is a complete example of a simple program:

.include "defines.h"

.function "MyFile", PPC_Start_Asm, PPC_End_Asm - PPC_Start_Asm

.text

PPC_Start_Asm:

MyFunction:

    ; To Do: place your assembly code here

PPC_End_Asm:

.import My_Function

; your other code

; call to My_Function subroutine

        bl     My_Function

; more code

In “Other_File.asm”

.export My_Function

My_Function:

        ;your My_Function code

        blr             ; return to MainSource file