P1. (10 points) Your friend walks up to you and says Professor Somani is making integer multiplication for signed numbers unnecessarily hard. His solution is to determine the shift-in bit in shift operation for add-and-shift algorithm to be the exclusive or of the sign bits of the two operands. Find a counter example to this and demonstrate it using two 4-bits signed operands. Show your multiplication in a tabular form. Also show the correct multiplication using the algorithm given in notes.

P2. (10 points) Using Booth's algorithm as shown in Figure 4.34, multiply two four bits operands 1000 by 1000. Show the results in a table. Explain the result.

P3. (10 points) Problem 4.53.

P4. (10 points) Problem 4.54.

P5. (10 points) Represent the following numbers using floating point representation as per the IEEE 754 standard.

1. 0.1
2. 10.5
3. -2/3
4. a negative infinity
5. 0.1 x 10 ^-135

P6. (10 points) Problem 5.5.
P7. (10 points) Problem 5.8.
P8. (05 points) Problem 5.9.
P9. (05 points) Problem 5.14.

P10. (20 points) Design a module RSlatch(S, R, Q, Qbar) using two NAND gates. Using this module, design a positive-level-triggered Dlatch(D, C, Q, Qbar) module. Use two of these modules to build a positive edge triggered Dflipflop(D, C, Q, Qbar) module.

Use four Dflipflop modules to build a register REG(D, C, Q) where D and Q are four bits input and four bits output, respectively. C is a free running clock  Use four REG modules to build a four-register file registerfile (datain, dataout1, dataout2, addra, addrb, addrc, write, clock). addra and addrb are two 2-bits addresses to read two registers simultaneously. The data are available on ports dataout1 and dataout2, respectively. addrc is a 2-bit address of the register to be written. datain  is input data. Clock is free running clock and  write is write enable signal that is valid only during middle of a clock cycle when data needs to be written.