Lab 03

CprE 305

This lab focuses on designing two basic computational structures – multiplexers and decoders.

To refresh your memory, a multiplexer is an element where control bits are used to select 1 of N inputs to be placed on the output line. In other words, the output line should reflect what is on the selected input line, a logical 1 or logical 0.

A decoder is an element that has N output, each one representing a particular combination of input bits. The corresponding output signal is at logic 0. All other outputs are at logic 1. For an n-bit decoder, there 2ⁿ output lines. A decoder may also include an enable signal. If the enable signal is logic 0, all outputs remain at logic 1.

1. Draw the gate-level design of a 2-to-1 multiplexer. Let the TA check your design.

2. Using the Max +plus II software, write a program for 2-to-1, 4-to-1, and 8-to-1 multiplexers. Design these modules carefully as they modules will be used in future labs as part of more complex designs. Save your work into your personal folder.

3. Run through the process of creating a default symbol, adding inputs and outputs in the graphics editor. Create sample-input waveforms. Run the simulation and verify the design. Make sure each design is working correctly.

4. Use two instantiations of a 2-to-1 multiplexer to design a 4-to-1 multiplexer. Use two instantiation of a 4-to-1 multiplexer to design an 8-to-1 multiplexer. Use the same tester as in Step 3 to test it.

5. Create modules for 2-to-4, 3-to-8, and 4-to-16 decoders with enable signal. For now, you should set the decoders so that the “selected” output line for the given N inputs is logical 0, while all other lines are logical 1 when enable signal is logic 0. Else, all outputs should be set to logic 1.

6. Use five instantiations of a 2-to-4 decoder with enable to design a 4-to-16 decoder with enable. Use the same tester as in Step 5 to test it.

7. Show the TA the waveform results of your 4-to-16 decoder with enable signal on and off.