Problem 1. Suppose you are performing an n x n matrix multiplication operation. You have to an architecture that has reconfigurable function units that can be configured to queue and vice versa by using instructions like MEMORY (Qi) or FUNCTION (Qi). You also have ADVANCE Qi instruction. Each Q is of length four (four stage pipeline). Develop a program using such an architecture to multiply these matrices efficiently.
Problem 2. Consider the RMB architecture.
Assume that a PE can start a request on the first available bus and the
request continues from there on. The requests start and finish at random
times.
(a) Develop a solution to shift
the bus opeartion down when any lower bus segments become available due
to termination of a request.
(b) Prove that your solution will
not lead to any undesirable, such as request hanging, situation or under-utilization.
If that is not the case then describe the effect of such a situation.