Assignment 23 (Assigned October 27)


  1. Using D flip-flops and multiplexers, design a 4-bit general-purpose shift register. The 4-bit shift register block has shift-in and shift-out bits at both left and right ends as shown in the figure below. The type of shift is controlled by a 2-bit shift code as specified below.
  2. Shift Code

    (Sh/Ld Lf/Rt)

    Shift type

    1 0

    Shift Left

    1 1

    Shift Right

    0 0

    Do not change

    0 1

    Load a new value

     

     

  3. Using the 4-bit shift register block as designed in Problem 1 and multiplexers, design a 8-bit shift data block. The most significant four bits for this block are input on a 4-bit data bus and the least significant four bits are stored in a 4-bit shift register block. The type of shift is controlled by a 2-bit shift code as specified below.

Shift Code

(s1 s0)

Shift type

1 0

Shift Left

1 1

Shift Right

0 0

No change

0 1

Load data in reg