*** Running vivado with args -log design_1_wrapper.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source design_1_wrapper.tcl ****** Vivado v2020.1 (64-bit) **** SW Build 2902540 on Wed May 27 19:54:49 MDT 2020 **** IP Build 2902112 on Wed May 27 22:43:36 MDT 2020 ** Copyright 1986-2020 Xilinx, Inc. All Rights Reserved. source design_1_wrapper.tcl -notrace INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/test-mp/project_1/project_1.ipdefs/IP_0_0'. INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/test-mp/IP'. INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2020.1/data/ip'. WARNING: [IP_Flow 19-1663] Duplicate IP found for 'avnet:avnet_hdmi:avnet_hdmi_out:3.1'. The one found in IP location 'c:/test-mp/project_1/project_1.ipdefs/IP_0_0/avnet_hdmi_out' will take precedence over the same IP in location c:/test-mp/IP/avnet_hdmi_out WARNING: [IP_Flow 19-4830] Duplicate Interface found for 'avnet.com:interface:avnet_ali3:1.0'. The one found in location 'c:/test-mp/project_1/project_1.ipdefs/IP_0_0/interfaces/avnet_ali3.xml' will take precedence over the same Interface in location 'c:/test-mp/IP/interfaces/avnet_ali3.xml' WARNING: [IP_Flow 19-4830] Duplicate Interface found for 'avnet.com:interface:avnet_hdmi:2.0'. The one found in location 'c:/test-mp/project_1/project_1.ipdefs/IP_0_0/interfaces/avnet_hdmi.xml' will take precedence over the same Interface in location 'c:/test-mp/IP/interfaces/avnet_hdmi.xml' WARNING: [IP_Flow 19-4830] Duplicate Interface found for 'avnet.com:interface:onsemi_vita_cam:1.0'. The one found in location 'c:/test-mp/project_1/project_1.ipdefs/IP_0_0/interfaces/onsemi_vita_cam.xml' will take precedence over the same Interface in location 'c:/test-mp/IP/interfaces/onsemi_vita_cam.xml' WARNING: [IP_Flow 19-4830] Duplicate Interface found for 'avnet.com:interface:onsemi_vita_spi:1.0'. The one found in location 'c:/test-mp/project_1/project_1.ipdefs/IP_0_0/interfaces/onsemi_vita_spi.xml' will take precedence over the same Interface in location 'c:/test-mp/IP/interfaces/onsemi_vita_spi.xml' WARNING: [IP_Flow 19-4830] Duplicate Interface found for 'avnet.com:user:SF_SM_Master_Bus:1.0'. The one found in location 'c:/test-mp/project_1/project_1.ipdefs/IP_0_0/interfaces/SF_SM_Master_Bus.xml' will take precedence over the same Interface in location 'c:/test-mp/IP/interfaces/SF_SM_Master_Bus.xml' Command: synth_design -top design_1_wrapper -part xc7z020clg484-1 Starting synth_design Attempting to get a license for feature 'Synthesis' and/or device 'xc7z020' INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xc7z020' INFO: [Device 21-403] Loading part xc7z020clg484-1 INFO: [Synth 8-7079] Multithreading enabled for synth_design using a maximum of 2 processes. INFO: [Synth 8-7078] Launching helper process for spawning children vivado processes INFO: [Synth 8-7075] Helper process launched with PID 725756 --------------------------------------------------------------------------------- Starting RTL Elaboration : Time (s): cpu = 00:00:04 ; elapsed = 00:00:04 . Memory (MB): peak = 1104.961 ; gain = 44.469 --------------------------------------------------------------------------------- INFO: [Synth 8-638] synthesizing module 'design_1_wrapper' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.vhd:64] INFO: [Synth 8-3491] module 'design_1' declared at 'C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:2351' bound to instance 'design_1_i' of component 'design_1' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.vhd:143] INFO: [Synth 8-638] synthesizing module 'design_1' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:2413] INFO: [Synth 8-3491] module 'design_1_avnet_hdmi_out_0_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_avnet_hdmi_out_0_0_stub.vhdl:5' bound to instance 'avnet_hdmi_out_0' of component 'design_1_avnet_hdmi_out_0_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:3442] INFO: [Synth 8-638] synthesizing module 'design_1_avnet_hdmi_out_0_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_avnet_hdmi_out_0_0_stub.vhdl:23] INFO: [Synth 8-3491] module 'design_1_axi_smc_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_axi_smc_0_stub.vhdl:5' bound to instance 'axi_smc' of component 'design_1_axi_smc_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:3457] INFO: [Synth 8-638] synthesizing module 'design_1_axi_smc_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_axi_smc_0_stub.vhdl:79] INFO: [Synth 8-3491] module 'design_1_axi_vdma_0_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_axi_vdma_0_0_stub.vhdl:5' bound to instance 'axi_vdma_0' of component 'design_1_axi_vdma_0_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:3528] INFO: [Synth 8-638] synthesizing module 'design_1_axi_vdma_0_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_axi_vdma_0_0_stub.vhdl:78] INFO: [Synth 8-3491] module 'design_1_axis_subset_converter_0_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_axis_subset_converter_0_0_stub.vhdl:5' bound to instance 'axis_subset_converter_0' of component 'design_1_axis_subset_converter_0_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:3598] INFO: [Synth 8-638] synthesizing module 'design_1_axis_subset_converter_0_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_axis_subset_converter_0_0_stub.vhdl:23] INFO: [Synth 8-3491] module 'design_1_clk_wiz_0_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_clk_wiz_0_0_stub.vhdl:5' bound to instance 'clk_wiz_0' of component 'design_1_clk_wiz_0_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:3613] INFO: [Synth 8-638] synthesizing module 'design_1_clk_wiz_0_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_clk_wiz_0_0_stub.vhdl:15] INFO: [Synth 8-3491] module 'design_1_fmc_imageon_iic_0_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_fmc_imageon_iic_0_0_stub.vhdl:5' bound to instance 'fmc_imageon_iic_0' of component 'design_1_fmc_imageon_iic_0_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:3620] INFO: [Synth 8-638] synthesizing module 'design_1_fmc_imageon_iic_0_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_fmc_imageon_iic_0_0_stub.vhdl:38] INFO: [Synth 8-3491] module 'design_1_fmc_ipmi_id_eeprom_0_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_fmc_ipmi_id_eeprom_0_0_stub.vhdl:5' bound to instance 'fmc_ipmi_id_eeprom_0' of component 'design_1_fmc_ipmi_id_eeprom_0_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:3650] INFO: [Synth 8-638] synthesizing module 'design_1_fmc_ipmi_id_eeprom_0_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_fmc_ipmi_id_eeprom_0_0_stub.vhdl:38] INFO: [Synth 8-3491] module 'design_1_onsemi_vita_cam_0_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_onsemi_vita_cam_0_0_stub.vhdl:5' bound to instance 'onsemi_vita_cam_0' of component 'design_1_onsemi_vita_cam_0_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:3680] INFO: [Synth 8-638] synthesizing module 'design_1_onsemi_vita_cam_0_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_onsemi_vita_cam_0_0_stub.vhdl:54] INFO: [Synth 8-3491] module 'design_1_onsemi_vita_spi_0_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_onsemi_vita_spi_0_0_stub.vhdl:5' bound to instance 'onsemi_vita_spi_0' of component 'design_1_onsemi_vita_spi_0_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:3726] INFO: [Synth 8-638] synthesizing module 'design_1_onsemi_vita_spi_0_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_onsemi_vita_spi_0_0_stub.vhdl:37] INFO: [Synth 8-3491] module 'design_1_processing_system7_0_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_processing_system7_0_0_stub.vhdl:5' bound to instance 'processing_system7_0' of component 'design_1_processing_system7_0_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:3755] INFO: [Synth 8-638] synthesizing module 'design_1_processing_system7_0_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_processing_system7_0_0_stub.vhdl:127] INFO: [Synth 8-638] synthesizing module 'design_1_ps7_0_axi_periph_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:1247] INFO: [Synth 8-638] synthesizing module 'm00_couplers_imp_15SPJYW' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:57] INFO: [Synth 8-256] done synthesizing module 'm00_couplers_imp_15SPJYW' (1#1) [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:57] INFO: [Synth 8-638] synthesizing module 'm01_couplers_imp_XU9C55' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:162] INFO: [Synth 8-256] done synthesizing module 'm01_couplers_imp_XU9C55' (2#1) [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:162] INFO: [Synth 8-638] synthesizing module 'm02_couplers_imp_14WQB4R' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:269] INFO: [Synth 8-256] done synthesizing module 'm02_couplers_imp_14WQB4R' (3#1) [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:269] INFO: [Synth 8-638] synthesizing module 'm03_couplers_imp_YFYJ3U' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:368] INFO: [Synth 8-256] done synthesizing module 'm03_couplers_imp_YFYJ3U' (4#1) [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:368] INFO: [Synth 8-638] synthesizing module 'm04_couplers_imp_17KQ732' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:466] INFO: [Synth 8-256] done synthesizing module 'm04_couplers_imp_17KQ732' (5#1) [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:466] INFO: [Synth 8-638] synthesizing module 'm05_couplers_imp_VQEDA7' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:571] INFO: [Synth 8-256] done synthesizing module 'm05_couplers_imp_VQEDA7' (6#1) [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:571] INFO: [Synth 8-638] synthesizing module 'm06_couplers_imp_16EQN6L' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:682] INFO: [Synth 8-256] done synthesizing module 'm06_couplers_imp_16EQN6L' (7#1) [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:682] INFO: [Synth 8-638] synthesizing module 's00_couplers_imp_UYSKKA' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:812] INFO: [Synth 8-3491] module 'design_1_auto_pc_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_auto_pc_0_stub.vhdl:5' bound to instance 'auto_pc' of component 'design_1_auto_pc_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:995] INFO: [Synth 8-638] synthesizing module 'design_1_auto_pc_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_auto_pc_0_stub.vhdl:70] INFO: [Synth 8-256] done synthesizing module 's00_couplers_imp_UYSKKA' (8#1) [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:812] INFO: [Synth 8-3491] module 'design_1_xbar_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_xbar_0_stub.vhdl:5' bound to instance 'xbar' of component 'design_1_xbar_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:2160] INFO: [Synth 8-638] synthesizing module 'design_1_xbar_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_xbar_0_stub.vhdl:51] INFO: [Synth 8-256] done synthesizing module 'design_1_ps7_0_axi_periph_0' (9#1) [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:1247] INFO: [Synth 8-3491] module 'design_1_rst_clk_wiz_0_148M_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_rst_clk_wiz_0_148M_0_stub.vhdl:5' bound to instance 'rst_clk_wiz_0_148M' of component 'design_1_rst_clk_wiz_0_148M_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:4057] INFO: [Synth 8-638] synthesizing module 'design_1_rst_clk_wiz_0_148M_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_rst_clk_wiz_0_148M_0_stub.vhdl:21] INFO: [Synth 8-3491] module 'design_1_rst_ps7_0_100M_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_rst_ps7_0_100M_0_stub.vhdl:5' bound to instance 'rst_ps7_0_100M' of component 'design_1_rst_ps7_0_100M_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:4070] INFO: [Synth 8-638] synthesizing module 'design_1_rst_ps7_0_100M_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_rst_ps7_0_100M_0_stub.vhdl:21] INFO: [Synth 8-3491] module 'design_1_v_axi4s_vid_out_0_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_v_axi4s_vid_out_0_0_stub.vhdl:5' bound to instance 'v_axi4s_vid_out_0' of component 'design_1_v_axi4s_vid_out_0_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:4083] INFO: [Synth 8-638] synthesizing module 'design_1_v_axi4s_vid_out_0_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_v_axi4s_vid_out_0_0_stub.vhdl:42] INFO: [Synth 8-3491] module 'design_1_v_tc_0_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_v_tc_0_0_stub.vhdl:5' bound to instance 'v_tc_0' of component 'design_1_v_tc_0_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:4117] INFO: [Synth 8-638] synthesizing module 'design_1_v_tc_0_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_v_tc_0_0_stub.vhdl:43] INFO: [Synth 8-3491] module 'design_1_v_vid_in_axi4s_0_0' declared at 'C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_v_vid_in_axi4s_0_0_stub.vhdl:5' bound to instance 'v_vid_in_axi4s_0' of component 'design_1_v_vid_in_axi4s_0_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:4152] INFO: [Synth 8-638] synthesizing module 'design_1_v_vid_in_axi4s_0_0' [C:/test-mp/project_1/project_1.runs/synth_1/.Xil/Vivado-723060-du329-01/realtime/design_1_v_vid_in_axi4s_0_0_stub.vhdl:37] INFO: [Synth 8-3491] module 'design_1_xlconstant_0_0' declared at 'c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_0/synth/design_1_xlconstant_0_0.v:57' bound to instance 'xlconstant_0' of component 'design_1_xlconstant_0_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:4181] INFO: [Synth 8-6157] synthesizing module 'design_1_xlconstant_0_0' [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_0/synth/design_1_xlconstant_0_0.v:57] INFO: [Synth 8-6157] synthesizing module 'xlconstant_v1_1_7_xlconstant' [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ipshared/fcfc/hdl/xlconstant_v1_1_vl_rfs.v:23] Parameter CONST_VAL bound to: 0 - type: integer Parameter CONST_WIDTH bound to: 1 - type: integer INFO: [Synth 8-6155] done synthesizing module 'xlconstant_v1_1_7_xlconstant' (10#1) [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ipshared/fcfc/hdl/xlconstant_v1_1_vl_rfs.v:23] INFO: [Synth 8-6155] done synthesizing module 'design_1_xlconstant_0_0' (11#1) [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_0/synth/design_1_xlconstant_0_0.v:57] INFO: [Synth 8-3491] module 'design_1_xlconstant_1_0' declared at 'c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_1_0/synth/design_1_xlconstant_1_0.v:57' bound to instance 'xlconstant_1' of component 'design_1_xlconstant_1_0' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:4185] INFO: [Synth 8-6157] synthesizing module 'design_1_xlconstant_1_0' [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_1_0/synth/design_1_xlconstant_1_0.v:57] INFO: [Synth 8-6157] synthesizing module 'xlconstant_v1_1_7_xlconstant__parameterized0' [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ipshared/fcfc/hdl/xlconstant_v1_1_vl_rfs.v:23] Parameter CONST_VAL bound to: 1 - type: integer Parameter CONST_WIDTH bound to: 1 - type: integer INFO: [Synth 8-6155] done synthesizing module 'xlconstant_v1_1_7_xlconstant__parameterized0' (11#1) [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ipshared/fcfc/hdl/xlconstant_v1_1_vl_rfs.v:23] INFO: [Synth 8-6155] done synthesizing module 'design_1_xlconstant_1_0' (12#1) [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_1_0/synth/design_1_xlconstant_1_0.v:57] INFO: [Synth 8-256] done synthesizing module 'design_1' (13#1) [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/synth/design_1.vhd:2413] INFO: [Synth 8-3491] module 'IOBUF' declared at 'C:/Xilinx/Vivado/2020.1/scripts/rt/data/unisim_comp.v:36238' bound to instance 'fmc_imageon_iic_scl_iobuf' of component 'IOBUF' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.vhd:199] INFO: [Synth 8-6157] synthesizing module 'IOBUF' [C:/Xilinx/Vivado/2020.1/scripts/rt/data/unisim_comp.v:36238] Parameter DRIVE bound to: 12 - type: integer Parameter IBUF_LOW_PWR bound to: TRUE - type: string Parameter IOSTANDARD bound to: DEFAULT - type: string Parameter SLEW bound to: SLOW - type: string INFO: [Synth 8-6155] done synthesizing module 'IOBUF' (14#1) [C:/Xilinx/Vivado/2020.1/scripts/rt/data/unisim_comp.v:36238] INFO: [Synth 8-3491] module 'IOBUF' declared at 'C:/Xilinx/Vivado/2020.1/scripts/rt/data/unisim_comp.v:36238' bound to instance 'fmc_imageon_iic_sda_iobuf' of component 'IOBUF' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.vhd:206] INFO: [Synth 8-3491] module 'IOBUF' declared at 'C:/Xilinx/Vivado/2020.1/scripts/rt/data/unisim_comp.v:36238' bound to instance 'fmc_ipmi_id_eeprom_scl_iobuf' of component 'IOBUF' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.vhd:213] INFO: [Synth 8-3491] module 'IOBUF' declared at 'C:/Xilinx/Vivado/2020.1/scripts/rt/data/unisim_comp.v:36238' bound to instance 'fmc_ipmi_id_eeprom_sda_iobuf' of component 'IOBUF' [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.vhd:220] INFO: [Synth 8-256] done synthesizing module 'design_1_wrapper' (15#1) [C:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.vhd:64] --------------------------------------------------------------------------------- Finished RTL Elaboration : Time (s): cpu = 00:00:06 ; elapsed = 00:00:06 . Memory (MB): peak = 1169.469 ; gain = 108.977 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Handling Custom Attributes --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Handling Custom Attributes : Time (s): cpu = 00:00:06 ; elapsed = 00:00:07 . Memory (MB): peak = 1169.469 ; gain = 108.977 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished RTL Optimization Phase 1 : Time (s): cpu = 00:00:06 ; elapsed = 00:00:07 . Memory (MB): peak = 1169.469 ; gain = 108.977 --------------------------------------------------------------------------------- Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.055 . Memory (MB): peak = 1169.469 ; gain = 0.000 INFO: [Netlist 29-17] Analyzing 4 Unisim elements for replacement INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds INFO: [Project 1-570] Preparing netlist for logic optimization Processing XDC Constraints Initializing timing engine Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc] for cell 'design_1_i/avnet_hdmi_out_0' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc] for cell 'design_1_i/avnet_hdmi_out_0' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_axi_smc_0/design_1_axi_smc_0/design_1_axi_smc_0_in_context.xdc] for cell 'design_1_i/axi_smc' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_axi_smc_0/design_1_axi_smc_0/design_1_axi_smc_0_in_context.xdc] for cell 'design_1_i/axi_smc' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_axi_vdma_0_0/design_1_axi_vdma_0_0/design_1_axi_vdma_0_0_in_context.xdc] for cell 'design_1_i/axi_vdma_0' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_axi_vdma_0_0/design_1_axi_vdma_0_0/design_1_axi_vdma_0_0_in_context.xdc] for cell 'design_1_i/axi_vdma_0' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_axis_subset_converter_0_0/design_1_axis_subset_converter_0_0/design_1_axis_subset_converter_0_0_in_context.xdc] for cell 'design_1_i/axis_subset_converter_0' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_axis_subset_converter_0_0/design_1_axis_subset_converter_0_0/design_1_axis_subset_converter_0_0_in_context.xdc] for cell 'design_1_i/axis_subset_converter_0' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0_in_context.xdc] for cell 'design_1_i/clk_wiz_0' WARNING: [Vivado 12-584] No ports matched ''. [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0_in_context.xdc:1] WARNING: [Vivado 12-584] No ports matched ''. [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0_in_context.xdc:4] Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0_in_context.xdc] for cell 'design_1_i/clk_wiz_0' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_fmc_imageon_iic_0_0/design_1_fmc_imageon_iic_0_0/design_1_fmc_imageon_iic_0_0_in_context.xdc] for cell 'design_1_i/fmc_imageon_iic_0' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_fmc_imageon_iic_0_0/design_1_fmc_imageon_iic_0_0/design_1_fmc_imageon_iic_0_0_in_context.xdc] for cell 'design_1_i/fmc_imageon_iic_0' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_fmc_ipmi_id_eeprom_0_0/design_1_fmc_ipmi_id_eeprom_0_0/design_1_fmc_ipmi_id_eeprom_0_0_in_context.xdc] for cell 'design_1_i/fmc_ipmi_id_eeprom_0' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_fmc_ipmi_id_eeprom_0_0/design_1_fmc_ipmi_id_eeprom_0_0/design_1_fmc_ipmi_id_eeprom_0_0_in_context.xdc] for cell 'design_1_i/fmc_ipmi_id_eeprom_0' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc] for cell 'design_1_i/processing_system7_0' WARNING: [Vivado 12-584] No ports matched ''. [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc:2] WARNING: [Vivado 12-584] No ports matched ''. [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc:4] WARNING: [Vivado 12-584] No ports matched ''. [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc:6] Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc] for cell 'design_1_i/processing_system7_0' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_rst_clk_wiz_0_148M_0/design_1_rst_clk_wiz_0_148M_0/design_1_rst_clk_wiz_0_148M_0_in_context.xdc] for cell 'design_1_i/rst_clk_wiz_0_148M' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_rst_clk_wiz_0_148M_0/design_1_rst_clk_wiz_0_148M_0/design_1_rst_clk_wiz_0_148M_0_in_context.xdc] for cell 'design_1_i/rst_clk_wiz_0_148M' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_rst_ps7_0_100M_0/design_1_rst_ps7_0_100M_0/design_1_rst_ps7_0_100M_0_in_context.xdc] for cell 'design_1_i/rst_ps7_0_100M' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_rst_ps7_0_100M_0/design_1_rst_ps7_0_100M_0/design_1_rst_ps7_0_100M_0_in_context.xdc] for cell 'design_1_i/rst_ps7_0_100M' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_v_axi4s_vid_out_0_0/design_1_v_axi4s_vid_out_0_0/design_1_v_axi4s_vid_out_0_0_in_context.xdc] for cell 'design_1_i/v_axi4s_vid_out_0' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_v_axi4s_vid_out_0_0/design_1_v_axi4s_vid_out_0_0/design_1_v_axi4s_vid_out_0_0_in_context.xdc] for cell 'design_1_i/v_axi4s_vid_out_0' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_v_tc_0_0/design_1_v_tc_0_0/design_1_v_tc_0_0_in_context.xdc] for cell 'design_1_i/v_tc_0' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_v_tc_0_0/design_1_v_tc_0_0/design_1_v_tc_0_0_in_context.xdc] for cell 'design_1_i/v_tc_0' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_xbar_0/design_1_xbar_0/design_1_xbar_0_in_context.xdc] for cell 'design_1_i/ps7_0_axi_periph/xbar' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_xbar_0/design_1_xbar_0/design_1_xbar_0_in_context.xdc] for cell 'design_1_i/ps7_0_axi_periph/xbar' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_auto_pc_0/design_1_auto_pc_0/design_1_auto_pc_0_in_context.xdc] for cell 'design_1_i/ps7_0_axi_periph/s00_couplers/auto_pc' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_auto_pc_0/design_1_auto_pc_0/design_1_auto_pc_0_in_context.xdc] for cell 'design_1_i/ps7_0_axi_periph/s00_couplers/auto_pc' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0_in_context.xdc] for cell 'design_1_i/onsemi_vita_spi_0' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0_in_context.xdc] for cell 'design_1_i/onsemi_vita_spi_0' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc] for cell 'design_1_i/onsemi_vita_cam_0' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc] for cell 'design_1_i/onsemi_vita_cam_0' Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_v_vid_in_axi4s_0_0/design_1_v_vid_in_axi4s_0_0/design_1_v_vid_in_axi4s_0_0_in_context.xdc] for cell 'design_1_i/v_vid_in_axi4s_0' Finished Parsing XDC File [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_v_vid_in_axi4s_0_0/design_1_v_vid_in_axi4s_0_0/design_1_v_vid_in_axi4s_0_0_in_context.xdc] for cell 'design_1_i/v_vid_in_axi4s_0' Parsing XDC File [C:/test-mp/project_1/project_1.srcs/constrs_1/imports/fmc_imageon_gs/zedboard_fmc_imageon_gs.xdc] CRITICAL WARNING: [Constraints 18-1056] Clock 'video_clk' completely overrides clock 'fmc_imageon_vclk'. New: create_clock -period 6.734 -name video_clk [get_ports fmc_imageon_vclk], [C:/test-mp/project_1/project_1.srcs/constrs_1/imports/fmc_imageon_gs/zedboard_fmc_imageon_gs.xdc:151] Previous: create_clock -period 6.734 [get_ports fmc_imageon_vclk], [c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0_in_context.xdc:2] Resolution: Review the constraint files and remove the redundant clock definition(s). If the clock constraints are not saved in a file, you can first save the constraints to an XDC file and reload the design once the constraints have been corrected. WARNING: [Vivado 12-627] No clocks matched 'clk_fpga_0'. [C:/test-mp/project_1/project_1.srcs/constrs_1/imports/fmc_imageon_gs/zedboard_fmc_imageon_gs.xdc:159] INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [C:/test-mp/project_1/project_1.srcs/constrs_1/imports/fmc_imageon_gs/zedboard_fmc_imageon_gs.xdc:159] WARNING: [Vivado 12-627] No clocks matched 'clk_fpga_1'. [C:/test-mp/project_1/project_1.srcs/constrs_1/imports/fmc_imageon_gs/zedboard_fmc_imageon_gs.xdc:159] INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks. [C:/test-mp/project_1/project_1.srcs/constrs_1/imports/fmc_imageon_gs/zedboard_fmc_imageon_gs.xdc:159] CRITICAL WARNING: [Vivado 12-4739] set_clock_groups:No valid object(s) found for '-group [get_clocks clk_fpga_0]'. [C:/test-mp/project_1/project_1.srcs/constrs_1/imports/fmc_imageon_gs/zedboard_fmc_imageon_gs.xdc:159] Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced. CRITICAL WARNING: [Vivado 12-4739] set_clock_groups:No valid object(s) found for '-group '. [C:/test-mp/project_1/project_1.srcs/constrs_1/imports/fmc_imageon_gs/zedboard_fmc_imageon_gs.xdc:159] Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced. CRITICAL WARNING: [Vivado 12-4739] set_clock_groups:No valid object(s) found for '-group [get_clocks clk_fpga_1]'. [C:/test-mp/project_1/project_1.srcs/constrs_1/imports/fmc_imageon_gs/zedboard_fmc_imageon_gs.xdc:159] Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced. CRITICAL WARNING: [Vivado 12-4739] set_clock_groups:No valid object(s) found for '-group '. [C:/test-mp/project_1/project_1.srcs/constrs_1/imports/fmc_imageon_gs/zedboard_fmc_imageon_gs.xdc:159] Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced. Finished Parsing XDC File [C:/test-mp/project_1/project_1.srcs/constrs_1/imports/fmc_imageon_gs/zedboard_fmc_imageon_gs.xdc] WARNING: [Project 1-498] One or more constraints failed evaluation while reading constraint file [C:/test-mp/project_1/project_1.srcs/constrs_1/imports/fmc_imageon_gs/zedboard_fmc_imageon_gs.xdc] and the design contains unresolved black boxes. These constraints will be read post-synthesis (as long as their source constraint file is marked as used_in_implementation) and should be applied correctly then. You should review the constraints listed in the file [.Xil/design_1_wrapper_propImpl.xdc] and check the run log file to verify that these constraints were correctly applied. INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [C:/test-mp/project_1/project_1.srcs/constrs_1/imports/fmc_imageon_gs/zedboard_fmc_imageon_gs.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/design_1_wrapper_propImpl.xdc]. Resolution: To avoid this warning, move constraints listed in [.Xil/design_1_wrapper_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis. Parsing XDC File [C:/test-mp/project_1/project_1.runs/synth_1/dont_touch.xdc] Finished Parsing XDC File [C:/test-mp/project_1/project_1.runs/synth_1/dont_touch.xdc] Completed Processing XDC Constraints Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 1251.523 ; gain = 0.000 INFO: [Project 1-111] Unisim Transformation Summary: A total of 4 instances were transformed. IOBUF => IOBUF (IBUF, OBUFT): 4 instances Constraint Validation Runtime : Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.019 . Memory (MB): peak = 1251.523 ; gain = 0.000 WARNING: [Timing 38-316] Clock period '10.000' specified during out-of-context synthesis of instance 'design_1_i/axi_vdma_0' at clock pin 'm_axi_mm2s_aclk' is different from the actual clock period '7.000', this can lead to different synthesis results. --------------------------------------------------------------------------------- Finished Constraint Validation : Time (s): cpu = 00:00:14 ; elapsed = 00:00:14 . Memory (MB): peak = 1251.523 ; gain = 191.031 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Loading Part and Timing Information --------------------------------------------------------------------------------- Loading part: xc7z020clg484-1 --------------------------------------------------------------------------------- Finished Loading Part and Timing Information : Time (s): cpu = 00:00:14 ; elapsed = 00:00:14 . Memory (MB): peak = 1251.523 ; gain = 191.031 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Applying 'set_property' XDC Constraints --------------------------------------------------------------------------------- Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_clk. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 1). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_clk. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 2). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_spdif. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 3). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_spdif. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 4). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 5). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 6). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[10]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 7). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[10]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 8). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[11]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 9). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[11]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 10). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[12]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 11). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[12]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 12). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[13]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 13). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[13]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 14). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[14]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 15). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[14]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 16). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[15]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 17). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[15]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 18). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 19). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 20). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 21). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 22). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 23). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 24). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[4]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 25). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[4]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 26). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[5]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 27). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[5]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 28). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[6]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 29). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[6]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 30). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[7]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 31). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[7]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 32). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[8]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 33). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[8]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 34). Applied set_property IO_BUFFER_TYPE = NONE for IO_HDMIO_data[9]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 35). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_HDMIO_data[9]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0/design_1_avnet_hdmi_out_0_0_in_context.xdc, line 36). Applied set_property IO_BUFFER_TYPE = NONE for fmc_imageon_vclk. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0_in_context.xdc, line 5). Applied set_property CLOCK_BUFFER_TYPE = NONE for fmc_imageon_vclk. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0/design_1_clk_wiz_0_0_in_context.xdc, line 6). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 7). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 8). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[10]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 9). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[10]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 10). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[11]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 11). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[11]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 12). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[12]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 13). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[12]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 14). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[13]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 15). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[13]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 16). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[14]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 17). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[14]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 18). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 19). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 20). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 21). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 22). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 23). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 24). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[4]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 25). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[4]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 26). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[5]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 27). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[5]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 28). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[6]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 29). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[6]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 30). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[7]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 31). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[7]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 32). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[8]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 33). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[8]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 34). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[9]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 35). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[9]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 36). Applied set_property IO_BUFFER_TYPE = NONE for DDR_ba[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 37). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_ba[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 38). Applied set_property IO_BUFFER_TYPE = NONE for DDR_ba[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 39). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_ba[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 40). Applied set_property IO_BUFFER_TYPE = NONE for DDR_ba[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 41). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_ba[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 42). Applied set_property IO_BUFFER_TYPE = NONE for DDR_cas_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 43). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_cas_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 44). Applied set_property IO_BUFFER_TYPE = NONE for DDR_cke. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 45). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_cke. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 46). Applied set_property IO_BUFFER_TYPE = NONE for DDR_cs_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 47). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_cs_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 48). Applied set_property IO_BUFFER_TYPE = NONE for DDR_ck_p. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 49). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_ck_p. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 50). Applied set_property IO_BUFFER_TYPE = NONE for DDR_ck_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 51). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_ck_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 52). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dm[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 53). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dm[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 54). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dm[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 55). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dm[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 56). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dm[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 57). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dm[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 58). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dm[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 59). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dm[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 60). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_p[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 61). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_p[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 62). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_p[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 63). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_p[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 64). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_p[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 65). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_p[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 66). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_p[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 67). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_p[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 68). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_n[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 69). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_n[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 70). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_n[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 71). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_n[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 72). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_n[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 73). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_n[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 74). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_n[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 75). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_n[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 76). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 77). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 78). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[10]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 79). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[10]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 80). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[11]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 81). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[11]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 82). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[12]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 83). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[12]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 84). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[13]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 85). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[13]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 86). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[14]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 87). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[14]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 88). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[15]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 89). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[15]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 90). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[16]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 91). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[16]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 92). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[17]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 93). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[17]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 94). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[18]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 95). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[18]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 96). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[19]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 97). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[19]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 98). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 99). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 100). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[20]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 101). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[20]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 102). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[21]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 103). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[21]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 104). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[22]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 105). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[22]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 106). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[23]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 107). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[23]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 108). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[24]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 109). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[24]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 110). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[25]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 111). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[25]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 112). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[26]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 113). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[26]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 114). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[27]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 115). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[27]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 116). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[28]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 117). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[28]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 118). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[29]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 119). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[29]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 120). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 121). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 122). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[30]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 123). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[30]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 124). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[31]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 125). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[31]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 126). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 127). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 128). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[4]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 129). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[4]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 130). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[5]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 131). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[5]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 132). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[6]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 133). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[6]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 134). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[7]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 135). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[7]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 136). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[8]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 137). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[8]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 138). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[9]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 139). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[9]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 140). Applied set_property IO_BUFFER_TYPE = NONE for DDR_reset_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 141). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_reset_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 142). Applied set_property IO_BUFFER_TYPE = NONE for DDR_odt. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 143). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_odt. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 144). Applied set_property IO_BUFFER_TYPE = NONE for DDR_ras_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 145). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_ras_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 146). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_ddr_vrn. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 147). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_ddr_vrn. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 148). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_ddr_vrp. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 149). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_ddr_vrp. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 150). Applied set_property IO_BUFFER_TYPE = NONE for DDR_we_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 151). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_we_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 152). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 153). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 154). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[10]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 155). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[10]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 156). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[11]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 157). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[11]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 158). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[12]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 159). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[12]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 160). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[13]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 161). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[13]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 162). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[14]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 163). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[14]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 164). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[15]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 165). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[15]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 166). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[16]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 167). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[16]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 168). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[17]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 169). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[17]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 170). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[18]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 171). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[18]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 172). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[19]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 173). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[19]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 174). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 175). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 176). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[20]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 177). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[20]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 178). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[21]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 179). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[21]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 180). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[22]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 181). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[22]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 182). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[23]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 183). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[23]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 184). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[24]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 185). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[24]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 186). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[25]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 187). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[25]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 188). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[26]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 189). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[26]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 190). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[27]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 191). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[27]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 192). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[28]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 193). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[28]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 194). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[29]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 195). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[29]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 196). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 197). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 198). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[30]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 199). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[30]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 200). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[31]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 201). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[31]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 202). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[32]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 203). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[32]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 204). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[33]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 205). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[33]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 206). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[34]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 207). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[34]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 208). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[35]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 209). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[35]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 210). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[36]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 211). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[36]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 212). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[37]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 213). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[37]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 214). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[38]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 215). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[38]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 216). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[39]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 217). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[39]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 218). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 219). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 220). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[40]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 221). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[40]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 222). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[41]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 223). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[41]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 224). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[42]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 225). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[42]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 226). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[43]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 227). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[43]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 228). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[44]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 229). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[44]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 230). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[45]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 231). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[45]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 232). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[46]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 233). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[46]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 234). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[47]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 235). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[47]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 236). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[48]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 237). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[48]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 238). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[49]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 239). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[49]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 240). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[4]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 241). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[4]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 242). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[50]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 243). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[50]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 244). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[51]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 245). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[51]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 246). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[52]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 247). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[52]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 248). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[53]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 249). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[53]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 250). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[5]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 251). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[5]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 252). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[6]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 253). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[6]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 254). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[7]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 255). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[7]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 256). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[8]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 257). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[8]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 258). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[9]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 259). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[9]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 260). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_ps_clk. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 261). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_ps_clk. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 262). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_ps_porb. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 263). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_ps_porb. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 264). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_ps_srstb. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 265). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_ps_srstb. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0/design_1_processing_system7_0_0_in_context.xdc, line 266). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_SPI_spi_mosi. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0_in_context.xdc, line 1). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_SPI_spi_mosi. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0_in_context.xdc, line 2). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_SPI_spi_sclk. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0_in_context.xdc, line 3). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_SPI_spi_sclk. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0_in_context.xdc, line 4). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_SPI_spi_ssel_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0_in_context.xdc, line 5). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_SPI_spi_ssel_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0/design_1_onsemi_vita_spi_0_0_in_context.xdc, line 6). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_clk_out_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 1). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_clk_out_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 2). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_clk_out_p. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 3). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_clk_out_p. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 4). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_clk_pll. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 5). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_clk_pll. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 6). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_data_n[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 7). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_data_n[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 8). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_data_n[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 9). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_data_n[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 10). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_data_n[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 11). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_data_n[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 12). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_data_n[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 13). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_data_n[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 14). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_data_p[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 15). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_data_p[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 16). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_data_p[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 17). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_data_p[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 18). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_data_p[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 19). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_data_p[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 20). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_data_p[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 21). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_data_p[3]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 22). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_reset_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 23). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_reset_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 24). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_sync_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 25). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_sync_n. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 26). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_sync_p. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 27). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_sync_p. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 28). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_trigger[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 29). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_trigger[0]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 30). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_trigger[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 31). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_trigger[1]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 32). Applied set_property IO_BUFFER_TYPE = NONE for IO_VITA_CAM_trigger[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 33). Applied set_property CLOCK_BUFFER_TYPE = NONE for IO_VITA_CAM_trigger[2]. (constraint file c:/test-mp/project_1/project_1.srcs/sources_1/bd/design_1/ip/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0/design_1_onsemi_vita_cam_0_0_in_context.xdc, line 34). Applied set_property DONT_TOUCH = true for design_1_i. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/avnet_hdmi_out_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/axi_smc. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/axi_vdma_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/axis_subset_converter_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/clk_wiz_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/fmc_imageon_iic_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/fmc_ipmi_id_eeprom_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/processing_system7_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/ps7_0_axi_periph. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/rst_clk_wiz_0_148M. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/rst_ps7_0_100M. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/v_axi4s_vid_out_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/v_tc_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/xlconstant_1. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/ps7_0_axi_periph/xbar. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/ps7_0_axi_periph/s00_couplers/auto_pc. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/onsemi_vita_spi_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/onsemi_vita_cam_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/xlconstant_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/v_vid_in_axi4s_0. (constraint file auto generated constraint, line ). --------------------------------------------------------------------------------- Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:00:14 ; elapsed = 00:00:14 . Memory (MB): peak = 1251.523 ; gain = 191.031 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished RTL Optimization Phase 2 : Time (s): cpu = 00:00:14 ; elapsed = 00:00:15 . Memory (MB): peak = 1251.523 ; gain = 191.031 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start RTL Component Statistics --------------------------------------------------------------------------------- Detailed RTL Component Info : --------------------------------------------------------------------------------- Finished RTL Component Statistics --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Part Resource Summary --------------------------------------------------------------------------------- Part Resources: DSPs: 220 (col length:60) BRAMs: 280 (col length: RAMB18 60 RAMB36 30) --------------------------------------------------------------------------------- Finished Part Resource Summary --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Cross Boundary and Area Optimization --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:16 ; elapsed = 00:00:16 . Memory (MB): peak = 1251.523 ; gain = 191.031 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Applying XDC Timing Constraints --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Applying XDC Timing Constraints : Time (s): cpu = 00:00:24 ; elapsed = 00:00:24 . Memory (MB): peak = 1251.523 ; gain = 191.031 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Timing Optimization --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Timing Optimization : Time (s): cpu = 00:00:24 ; elapsed = 00:00:24 . Memory (MB): peak = 1251.523 ; gain = 191.031 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Technology Mapping --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Technology Mapping : Time (s): cpu = 00:00:24 ; elapsed = 00:00:25 . Memory (MB): peak = 1258.582 ; gain = 198.090 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Flattening Before IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Flattening Before IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Final Netlist Cleanup --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Final Netlist Cleanup --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished IO Insertion : Time (s): cpu = 00:00:28 ; elapsed = 00:00:28 . Memory (MB): peak = 1263.379 ; gain = 202.887 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Renaming Generated Instances --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Instances : Time (s): cpu = 00:00:28 ; elapsed = 00:00:28 . Memory (MB): peak = 1263.379 ; gain = 202.887 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Rebuilding User Hierarchy --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Rebuilding User Hierarchy : Time (s): cpu = 00:00:28 ; elapsed = 00:00:28 . Memory (MB): peak = 1263.379 ; gain = 202.887 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Renaming Generated Ports --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Ports : Time (s): cpu = 00:00:28 ; elapsed = 00:00:28 . Memory (MB): peak = 1263.379 ; gain = 202.887 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Handling Custom Attributes --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Handling Custom Attributes : Time (s): cpu = 00:00:28 ; elapsed = 00:00:28 . Memory (MB): peak = 1263.379 ; gain = 202.887 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Renaming Generated Nets --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Nets : Time (s): cpu = 00:00:28 ; elapsed = 00:00:28 . Memory (MB): peak = 1263.379 ; gain = 202.887 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Writing Synthesis Report --------------------------------------------------------------------------------- Report BlackBoxes: +------+-----------------------------------+----------+ | |BlackBox name |Instances | +------+-----------------------------------+----------+ |1 |design_1_xbar_0 | 1| |2 |design_1_auto_pc_0 | 1| |3 |design_1_avnet_hdmi_out_0_0 | 1| |4 |design_1_axi_smc_0 | 1| |5 |design_1_axi_vdma_0_0 | 1| |6 |design_1_axis_subset_converter_0_0 | 1| |7 |design_1_clk_wiz_0_0 | 1| |8 |design_1_fmc_imageon_iic_0_0 | 1| |9 |design_1_fmc_ipmi_id_eeprom_0_0 | 1| |10 |design_1_onsemi_vita_cam_0_0 | 1| |11 |design_1_onsemi_vita_spi_0_0 | 1| |12 |design_1_processing_system7_0_0 | 1| |13 |design_1_rst_clk_wiz_0_148M_0 | 1| |14 |design_1_rst_ps7_0_100M_0 | 1| |15 |design_1_v_axi4s_vid_out_0_0 | 1| |16 |design_1_v_tc_0_0 | 1| |17 |design_1_v_vid_in_axi4s_0_0 | 1| +------+-----------------------------------+----------+ Report Cell Usage: +------+----------------------------------------+------+ | |Cell |Count | +------+----------------------------------------+------+ |1 |design_1_auto_pc_0_bbox | 1| |2 |design_1_avnet_hdmi_out_0_0_bbox | 1| |3 |design_1_axi_smc_0_bbox | 1| |4 |design_1_axi_vdma_0_0_bbox | 1| |5 |design_1_axis_subset_converter_0_0_bbox | 1| |6 |design_1_clk_wiz_0_0_bbox | 1| |7 |design_1_fmc_imageon_iic_0_0_bbox | 1| |8 |design_1_fmc_ipmi_id_eeprom_0_0_bbox | 1| |9 |design_1_onsemi_vita_cam_0_0_bbox | 1| |10 |design_1_onsemi_vita_spi_0_0_bbox | 1| |11 |design_1_processing_system7_0_0_bbox | 1| |12 |design_1_rst_clk_wiz_0_148M_0_bbox | 1| |13 |design_1_rst_ps7_0_100M_0_bbox | 1| |14 |design_1_v_axi4s_vid_out_0_0_bbox | 1| |15 |design_1_v_tc_0_0_bbox | 1| |16 |design_1_v_vid_in_axi4s_0_0_bbox | 1| |17 |design_1_xbar_0_bbox | 1| |18 |IBUF | 4| |19 |IOBUF | 4| |20 |OBUF | 1| +------+----------------------------------------+------+ --------------------------------------------------------------------------------- Finished Writing Synthesis Report : Time (s): cpu = 00:00:28 ; elapsed = 00:00:28 . Memory (MB): peak = 1263.379 ; gain = 202.887 --------------------------------------------------------------------------------- Synthesis finished with 0 errors, 0 critical warnings and 0 warnings. Synthesis Optimization Runtime : Time (s): cpu = 00:00:19 ; elapsed = 00:00:25 . Memory (MB): peak = 1263.379 ; gain = 120.832 Synthesis Optimization Complete : Time (s): cpu = 00:00:28 ; elapsed = 00:00:28 . Memory (MB): peak = 1263.379 ; gain = 202.887 INFO: [Project 1-571] Translating synthesized netlist Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.037 . Memory (MB): peak = 1263.379 ; gain = 0.000 INFO: [Netlist 29-17] Analyzing 4 Unisim elements for replacement INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds INFO: [Project 1-570] Preparing netlist for logic optimization INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s). Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 1288.637 ; gain = 0.000 INFO: [Project 1-111] Unisim Transformation Summary: A total of 4 instances were transformed. IOBUF => IOBUF (IBUF, OBUFT): 4 instances INFO: [Common 17-83] Releasing license: Synthesis 96 Infos, 15 Warnings, 5 Critical Warnings and 0 Errors encountered. synth_design completed successfully synth_design: Time (s): cpu = 00:00:34 ; elapsed = 00:00:37 . Memory (MB): peak = 1288.637 ; gain = 228.145 WARNING: [Constraints 18-5210] No constraints selected for write. Resolution: This message can indicate that there are no constraints for the design, or it can indicate that the used_in flags are set such that the constraints are ignored. This later case is used when running synth_design to not write synthesis constraints to the resulting checkpoint. Instead, project constraints are read when the synthesized design is opened. INFO: [Common 17-1381] The checkpoint 'C:/test-mp/project_1/project_1.runs/synth_1/design_1_wrapper.dcp' has been generated. INFO: [runtcl-4] Executing : report_utilization -file design_1_wrapper_utilization_synth.rpt -pb design_1_wrapper_utilization_synth.pb INFO: [Common 17-206] Exiting Vivado at Wed Mar 10 08:36:26 2021...