BlockDiagram

EXTERNAL PORTS
These are the external ports defined in the MHS file.
Attributes Key
The attributes are obtained from the SIGIS and IOB_STATE parameters set on the PORT in the MHS file
CLK  indicates Clock ports, (SIGIS = CLK) 
INTR  indicates Interrupt ports,(SIGIS = INTR) 
RESET  indicates Reset ports, (SIGIS = RST) 
BUF or REG  Indicates ports that instantiate or infer IOB primitives, (IOB_STATE = BUF or REG) 
# NAME DIR [LSB:MSB] SIG ATTRIBUTES
0GLB fpga_0_Hard_Ethernet_MAC_PHY_MII_INT I 1 fpga_0_Hard_Ethernet_MAC_PHY_MII_INT  INTR 
1A fpga_0_DDR2_SDRAM_DDR2_DQ IO 63:0 fpga_0_DDR2_SDRAM_DDR2_DQ
2A fpga_0_DDR2_SDRAM_DDR2_DQS IO 7:0 fpga_0_DDR2_SDRAM_DDR2_DQS
3A fpga_0_DDR2_SDRAM_DDR2_DQS_N IO 7:0 fpga_0_DDR2_SDRAM_DDR2_DQS_N
4A fpga_0_DDR2_SDRAM_DDR2_A_pin O 12:0 fpga_0_DDR2_SDRAM_DDR2_A
5A fpga_0_DDR2_SDRAM_DDR2_BA_pin O 1:0 fpga_0_DDR2_SDRAM_DDR2_BA
6A fpga_0_DDR2_SDRAM_DDR2_CAS_N_pin O 1 fpga_0_DDR2_SDRAM_DDR2_CAS_N
7A fpga_0_DDR2_SDRAM_DDR2_CKE_pin O 0:0 fpga_0_DDR2_SDRAM_DDR2_CKE
8A fpga_0_DDR2_SDRAM_DDR2_CK_N_pin O 1:0 fpga_0_DDR2_SDRAM_DDR2_CK_N
9A fpga_0_DDR2_SDRAM_DDR2_CK_pin O 1:0 fpga_0_DDR2_SDRAM_DDR2_CK
10A fpga_0_DDR2_SDRAM_DDR2_CS_N_pin O 0:0 fpga_0_DDR2_SDRAM_DDR2_CS_N
11A fpga_0_DDR2_SDRAM_DDR2_DM_pin O 7:0 fpga_0_DDR2_SDRAM_DDR2_DM
12A fpga_0_DDR2_SDRAM_DDR2_ODT_pin O 1:0 fpga_0_DDR2_SDRAM_DDR2_ODT
13A fpga_0_DDR2_SDRAM_DDR2_RAS_N_pin O 1 fpga_0_DDR2_SDRAM_DDR2_RAS_N
14A fpga_0_DDR2_SDRAM_DDR2_WE_N_pin O 1 fpga_0_DDR2_SDRAM_DDR2_WE_N
15B fpga_0_DIP_Switches_8Bit_GPIO_IO_pin IO 0:7 fpga_0_DIP_Switches_8Bit_GPIO_IO
16C fpga_0_Hard_Ethernet_MAC_GMII_RXD_0_pin I 7:0 fpga_0_Hard_Ethernet_MAC_GMII_RXD_0
17C fpga_0_Hard_Ethernet_MAC_GMII_RX_CLK_0_pin I 1 fpga_0_Hard_Ethernet_MAC_GMII_RX_CLK_0
18C fpga_0_Hard_Ethernet_MAC_GMII_RX_DV_0_pin I 1 fpga_0_Hard_Ethernet_MAC_GMII_RX_DV_0
19C fpga_0_Hard_Ethernet_MAC_GMII_RX_ER_0_pin I 1 fpga_0_Hard_Ethernet_MAC_GMII_RX_ER_0
20C fpga_0_Hard_Ethernet_MAC_MII_TX_CLK_0_pin I 1 fpga_0_Hard_Ethernet_MAC_MII_TX_CLK_0
21C fpga_0_Hard_Ethernet_MAC_MDIO_0_pin IO 1 fpga_0_Hard_Ethernet_MAC_MDIO_0
22C fpga_0_Hard_Ethernet_MAC_GMII_TXD_0_pin O 7:0 fpga_0_Hard_Ethernet_MAC_GMII_TXD_0
23C fpga_0_Hard_Ethernet_MAC_GMII_TX_CLK_0_pin O 1 fpga_0_Hard_Ethernet_MAC_GMII_TX_CLK_0
24C fpga_0_Hard_Ethernet_MAC_GMII_TX_EN_0_pin O 1 fpga_0_Hard_Ethernet_MAC_GMII_TX_EN_0
25C fpga_0_Hard_Ethernet_MAC_GMII_TX_ER_0_pin O 1 fpga_0_Hard_Ethernet_MAC_GMII_TX_ER_0
26C fpga_0_Hard_Ethernet_MAC_MDC_0_pin O 1 fpga_0_Hard_Ethernet_MAC_MDC_0
27C fpga_0_Hard_Ethernet_MAC_TemacPhy_RST_n_pin O 1 fpga_0_Hard_Ethernet_MAC_TemacPhy_RST_n
28D fpga_0_IIC_EEPROM_Scl_pin IO 1 fpga_0_IIC_EEPROM_Scl
29D fpga_0_IIC_EEPROM_Sda_pin IO 1 fpga_0_IIC_EEPROM_Sda
30E fpga_0_LEDs_8Bit_GPIO_IO_pin IO 0:7 fpga_0_LEDs_8Bit_GPIO_IO
31F fpga_0_LEDs_Positions_GPIO_IO_pin IO 0:4 fpga_0_LEDs_Positions_GPIO_IO
32G fpga_0_Push_Buttons_5Bit_GPIO_IO_pin IO 0:4 fpga_0_Push_Buttons_5Bit_GPIO_IO
33H fpga_0_RS232_Uart_1_sin_pin I 1 fpga_0_RS232_Uart_1_sin
34H fpga_0_RS232_Uart_1_sout_pin O 1 fpga_0_RS232_Uart_1_sout
35I fpga_0_RS232_Uart_2_sin_pin I 1 fpga_0_RS232_Uart_2_sin
36I fpga_0_RS232_Uart_2_sout_pin O 1 fpga_0_RS232_Uart_2_sout
 
# NAME DIR [LSB:MSB] SIG ATTRIBUTES
37J fpga_0_SRAM_Mem_DQ_pin IO 0:31 fpga_0_SRAM_Mem_DQ
38J SRAM_Mem_LBON_pin O 1 SRAM_Mem_LBON
39J fpga_0_SRAM_Mem_ADV_LDN_pin O 1 fpga_0_SRAM_Mem_ADV_LDN
40J fpga_0_SRAM_Mem_BEN_pin O 0:3 fpga_0_SRAM_Mem_BEN
41J fpga_0_SRAM_Mem_CEN_pin O 0:1 fpga_0_SRAM_Mem_CEN
42J fpga_0_SRAM_Mem_OEN_pin O 0:1 fpga_0_SRAM_Mem_OEN
43J fpga_0_SRAM_Mem_WEN_pin O 1 fpga_0_SRAM_Mem_WEN
44K fpga_0_SRAM_Mem_A_pin O 7:30 fpga_0_SRAM_Mem_A
45L fpga_0_SysACE_CompactFlash_SysACE_CLK_pin I 1 fpga_0_SysACE_CompactFlash_SysACE_CLK
46L fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin I 1 fpga_0_SysACE_CompactFlash_SysACE_MPIRQ
47L fpga_0_SysACE_CompactFlash_SysACE_MPD_pin IO 15:0 fpga_0_SysACE_CompactFlash_SysACE_MPD
48L fpga_0_SysACE_CompactFlash_SysACE_CEN_pin O 1 fpga_0_SysACE_CompactFlash_SysACE_CEN
49L fpga_0_SysACE_CompactFlash_SysACE_MPA_pin O 6:0 fpga_0_SysACE_CompactFlash_SysACE_MPA
50L fpga_0_SysACE_CompactFlash_SysACE_OEN_pin O 1 fpga_0_SysACE_CompactFlash_SysACE_OEN
51L fpga_0_SysACE_CompactFlash_SysACE_WEN_pin O 1 fpga_0_SysACE_CompactFlash_SysACE_WEN
52M fpga_0_SRAM_CLK_FB I 1 ZBT_CLK_FB_s  CLK 
53M sys_clk_pin I 1 dcm_clk_s  CLK 
54M fpga_0_SRAM_CLK O 1 ZBT_CLK_OUT_s
55N xps_iic_0_Scl IO 1 xps_iic_0_Scl
56N xps_iic_0_Sda IO 1 xps_iic_0_Sda
57N plbv46_dvi_cntlr_0_TFT_LCD_CLK_N_pin O 1 plbv46_dvi_cntlr_0_TFT_LCD_CLK_N
58N plbv46_dvi_cntlr_0_TFT_LCD_CLK_P_pin O 1 plbv46_dvi_cntlr_0_TFT_LCD_CLK_P
59N plbv46_dvi_cntlr_0_TFT_LCD_DATA_pin O 11:0 plbv46_dvi_cntlr_0_TFT_LCD_DATA
60N plbv46_dvi_cntlr_0_TFT_LCD_DE_pin O 1 plbv46_dvi_cntlr_0_TFT_LCD_DE
61N plbv46_dvi_cntlr_0_TFT_LCD_HSYNC_pin O 1 plbv46_dvi_cntlr_0_TFT_LCD_HSYNC
62N plbv46_dvi_cntlr_0_TFT_LCD_VSYNC_pin O 1 plbv46_dvi_cntlr_0_TFT_LCD_VSYNC
63O sys_rst_pin I 1 sys_rst_s  RESET 
64O vga_reset_pin O 1 sys_rst_s  RESET 
65P xps_gpio_0_GPIO_IO IO 0:1 xps_gpio_0_GPIO_IO
66Q xps_gpio_1_GPIO_IO IO 0:0 xps_gpio_1_GPIO_IO
67R xps_gpio_2_GPIO_IO IO 0:2 xps_gpio_2_GPIO_IO
68S xps_gpio_3_GPIO_IO IO 0:1 xps_gpio_3_GPIO_IO
69T xps_gpio_4_GPIO_IO IO 0:6 xps_gpio_4_GPIO_IO
70U xps_iic_1_Scl IO 1 xps_iic_1_Scl
71U xps_iic_1_Sda IO 1 xps_iic_1_Sda
72V xps_iic_2_Scl IO 1 xps_iic_2_Scl
73V xps_iic_2_Sda IO 1 xps_iic_2_Sda