2. Design using the 1-bit maximizer component, a 4-bit maximizer component. Assume the data iputs to the 4-bit maximizer are unsigned integers.
3. Given a supply of 2-to-4 decoders, together with a supply of inverter
gates, show how to get a 3-to-8 decoder circuit. Assume each of the 2-to-4
decoders has an ENABLE input (ENABLE = 1 enables the decoder), but you
need not include an enable capability on the 3-to-8 circuit.