Assignment 25 (Assigned November 1)

1. In this assignment we will start worrying about delay sin circuits. Consider an eight-register file with four bits each. We want to estimate its delay
1. First estimate delay of a latch. It has two gates connected back to back. Convince yourself that a three gate delay is sufficient to get an output to be stable is an RS latch and then write down your answer explaining the delay.
2. A D-latch uses two additional gates and an inverter. How many gate delays we need to allow for this latch?
3. Now look at a D-flip-flop that uses two such latches. First compute a simple answer for delay through a D-flip flop. Then argue if the delay is going to be less than or more than your simple answer.
2. Consider an 8-to-1 MUX and a 3-to-8 decoder. How much delay is there through each of these circuits. Draw a diagram to show a decoder and a multiplexer using AND, OR, and NOT gates to estimate the delay.